International Journal of Science, Engineering and TechnologyAuthors: Pallab Basak, Wang Bao Hua
Abstract: Four-Wheel Independent Drive (4WID) electric vehicles offer unprecedented authority over individual wheel forces, enabling propulsion-based yaw stability control through torque vectoring. Model Predictive Control (MPC) has emerged as the dominant academic paradigm for multi-objective vehicle dynamic control owing to its constraint-handling capability and predictive horizon structure. However, the online solution of constrained quadratic programs incurs O(n³) computational complexity with respect to the prediction horizon length, rendering real-time deployment on standard automotive embedded controllers impractical for most production-grade applications. This paper proposes an architecture comprising a Sliding Mode Control (SMC) yaw stability controller integrated with a two-dimensional (2D) motor efficiency map (η-map) based torque allocator that resolves the corrective wheel torque distribution problem in O(1) time via direct memory lookup. The SMC formulates a sliding surface combining yaw rate error and sideslip angle error, deploying a boundary-layer saturation function to eliminate chattering while preserving robust stability margins under nonlinear tire dynamics and variable road friction. The efficiency-aware torque allocator pre-computes optimal torque-speed operating regions offline and retrieves them via a 2D lookup table at each control step, achieving multi-objective performance simultaneous stability enhancement and energy efficiency improvementwithout requiring any online optimization. Comparative MATLAB/Simulink evaluation under a standardized step-steer maneuver at 60 km/h on a dry surface (μ = 0.85) demonstrates that the proposed SMC reduces yaw rate root-mean-square error (RMSE) by 51.2% relative to the proportional (P) baseline, by 33.5% relative to PID, and by 37.6% relative to the Linear Quadratic Regulator (LQR), while consuming only 139.8 kJ compared to the highest-consumption controller at 142.7 kJ. Theoretical execution time analysis confirms that the proposed architecture is compatible with 1 ms embedded controller cycle times on standard 32-bit automotive-grade microcontrollers, a target that MPC-based alternatives cannot reliably meet without dedicated co-processor hardware.
DOI: https://doi.org/10.5281/zenodo.23612861
